Since then Skylake, Kaby Lake and Coffeelake have each been released on the same 14nm process node, with the latter two being optimisations of the Skylake architecture. This ushered in the ‘Process -> Architecture -> Optimisation’ model, three distinct phases on the same process, beginning with Broadwell on 14nm.
The rising costs of ever shrinking process nodes to keep up with Moore’s Law had become untenable, so more needed to be done with the technology available. đ6 PCI-Express 3.0 lanes direct to the CPU –1x16 / 2x8 / 1x8 + 2x4 configurationsįEATURESIn 2016 Intel formally retired the ‘Tick-Tock’ architectural development model. 40 total PCI-Express Lanes shared among chipset and other integrated and expansion devices Ę Physical Coffee Lake cores, 16 threads, supporting Hyperthreading.
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